bn:03112050n
Noun Concept
Categories: All articles needing additional references, Instruction processing
EN
hazard  read after write  write after read  branch hazard  control hazard
EN
In the domain of central processing unit design, hazards are problems with the instruction pipeline in CPU microarchitectures when the next instruction cannot execute in the following clock cycle, and can potentially lead to incorrect computation results. Wikipedia
English:
computer architecture
Definitions
Sources
EN
In the domain of central processing unit design, hazards are problems with the instruction pipeline in CPU microarchitectures when the next instruction cannot execute in the following clock cycle, and can potentially lead to incorrect computation results. Wikipedia